Reuters — IBM Corp. on Tuesday will announce a new chip design that it says will quadruple the performance of future wireless devices and reduce their power consumption by 80 percent.
The new complementary metal oxide semiconductor and silicon germanium bipolar chips will use one-fifth as much power as current technology, IBM said.
It combines computing and communications capabilities on one “silicon on insulator” wafer that is thin enough to maximize both components, IBM said.
The new chip design is expected to be implemented within five years, boosting the performance of applications such as streaming video on cell phones, IBM said.
The chips will be manufactured using next-generation 65 nanometer, equal to 1/500th the width of a human hair, or even smaller 45 nanometer processes, Ghavam Shahidi, fellow and director of silicon technology at IBM Research, said in an interview on Monday.
The smaller the circuitry and space between transistors the more that can fit on a chip, increasing the computing power with no increase in cost or size.